 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| TJA1054 Fault-tolerant CAN transceiver Rev. 04 -- 24 September 2009 Product data sheet 1. General description The TJA1054 is the interface between the protocol controller and the physical bus wires in a Controller Area Network (CAN). It is primarily intended for low-speed applications up to 125 kBd in passenger cars. The device provides differential receive and transmit capability but will switch to single-wire transmitter and/or receiver in error conditions. The TJA1054T is pin and downwards compatible with the PCA82C252T and the TJA1053T. This means that these two devices can be replaced by the TJA1054T with retention of all functions. The most important improvements of the TJA1054 with respect to the PCA82C252 and TJA1053 are: * * * * * * Very low EME due to a very good matching of the CANL and CANH output signals Good EMI, especially in low power modes Full wake-up capability during bus failures Extended bus failure management including short-circuit of the CANH bus line to VCC Support for easy system fault diagnosis Two-edge sensitive wake-up input signal via pin WAKE 2. Features 2.1 Optimized for in-car low-speed communication I I I I Baud rate up to 125 kBd Up to 32 nodes can be connected Supports unshielded bus wires Very low ElectroMagnetic Emission (EME) due to built-in slope control function and a very good matching of the CANL and CANH bus outputs I Very high ElectroMagnetic Immunity (EMI) in normal and low power operating modes I Fully integrated receiver filters I Transmit Data (TxD) dominant time-out function 2.2 Bus failure management I Supports single-wire transmission modes with ground offset voltages up to 1.5 V I Automatic switching to single-wire mode in the event of bus failures, even when the CANH bus wire is short-circuited to VCC I Automatic reset to differential mode if bus failure is removed I Full wake-up capability during failure modes NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 2.3 Protections I I I I Bus pins short-circuit safe to battery and to ground Thermally protected Bus lines protected against transients in an automotive environment An unpowered node does not disturb the bus lines 2.4 Support for low power modes I Low current sleep mode and standby mode with wake-up via the bus lines I Power-on reset flag on the output 3. Quick reference data Table 1. Quick reference data VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = -40 C to +150 C; all voltages are defined with respect to ground; positive currents flow into the device; unless otherwise specified.[1][2] Symbol Parameter VCC VBAT supply voltage battery supply voltage on pin BAT no time limit operating mode load dump IBAT VCANH battery supply current on pin BAT voltage on pin CANH sleep mode; VCC = 0 V; VBAT = 12 V VCC = 0 V to 5.0 V; VBAT 0 V; no time limit; with respect to any other pin VCC = 0 V to 5.0 V; VBAT 0 V; no time limit; with respect to any other pin [3] Conditions Min 4.75 -0.3 5.0 -40 Typ 30 - Max 5.25 +40 27 40 50 +40 Unit V V V V A V VCANL voltage on pin CANL -40 - +40 V VCANH VCANL tPD(L) tr tf Tvj [1] voltage drop on pin CANH ICANH = -40 mA voltage drop on pin CANL ICANL = 40 mA propagation delay TXD (LOW) to RXD (LOW) bus line output rise time bus line output fall time virtual junction temperature between 10 % and 90 %; C1 = 10 nF; see Figure 5 between 10 % and 90 %; C1 = 1 nF; see Figure 5 [4] -40 1 0.6 0.3 - 1.4 1.4 +150 V V s s s C All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 C for dies on wafer level, and above this for cased products 100 % tested at Tamb = 25 C, unless otherwise specified. For bare die, all parameters are only guaranteed if the back side of the die is connected to ground. A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if VBAT = 5.3 V to 27 V see Table 5. [2] [3] TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 2 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver [4] Junction temperature in accordance with "IEC 60747-1". An alternative definition is: Tvj = Tamb + P x Rth(vj-a) where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient temperature (Tamb). 4. Ordering information Table 2. Ordering information Package Name TJA1054T TJA1054T/S900 TJA1054U SO14 SO14 Description plastic small outline package; 14 leads; body width 3.9 mm plastic small outline package; 14 leads; body width 3.9 mm bare die; 1990 x 2700 x 375 m Version SOT108-1 SOT108-1 Type number 5. Block diagram BAT 14 VCC 10 INH WAKE STB EN 1 7 5 6 VCC 2 DRIVER TIMER WAKE-UP STANDBY CONTROL TEMPERATURE PROTECTION 9 11 12 8 RTL CANH CANL RTH TXD VCC 4 FAILURE DETECTOR PLUS WAKE-UP PLUS TIME-OUT TJA1054 ERR VCC 3 RECEIVER FILTER RXD FILTER 13 GND mgl421 Fig 1. Block diagram TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 3 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 6. Pinning information 6.1 Pinning INH TXD RXD ERR STB EN WAKE 1 2 3 4 5 6 7 001aaf610 14 BAT 13 GND 12 CANL TJA1054T 11 CANH 10 VCC 9 8 RTL RTH Fig 2. Pin configuration 6.2 Pin description Table 3. Symbol INH TXD RXD ERR Pin description Pin 1 2 3 4 Description inhibit output for switching an external voltage regulator if a wake-up signal occurs transmit data input for activating the driver to the bus lines receive data output for reading out the data from the bus lines error, wake-up and power-on indication output; active LOW in normal operating mode when a bus failure is detected; active LOW in standby and sleep mode when a wake-up is detected; active LOW in power-on standby when a VBAT power-on event is detected standby digital control signal input; together with the input signal on pin EN this input determines the state of the transceiver; see Table 5 and Figure 3 enable digital control signal input; together with the input signal on pin STB this input determines the state of the transceiver; see Table 5 and Figure 3 local wake-up signal input (active LOW); both falling and rising edges are detected termination resistor connection; in case of a CANH bus wire error the line is terminated with a predefined impedance termination resistor connection; in case of a CANL bus wire error the line is terminated with a predefined impedance supply voltage HIGH-level CAN bus line LOW-level CAN bus line ground battery supply voltage STB 5 EN 6 WAKE RTH RTL VCC CANH CANL GND BAT 7 8 9 10 11 12 13 14 TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 4 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 7. Functional description The TJA1054 is the interface between the CAN protocol controller and the physical wires of the CAN bus (see Figure 7). It is primarily intended for low-speed applications, up to 125 kBd, in passenger cars. The device provides differential transmit capability to the CAN bus and differential receive capability to the CAN controller. To reduce EME, the rise and fall slopes are limited. This allows the use of an unshielded twisted pair or a parallel pair of wires for the bus lines. Moreover, the device supports transmission capability on either bus line if one of the wires is corrupted. The failure detection logic automatically selects a suitable transmission mode. In normal operating mode (no wiring failures) the differential receiver is output on pin RXD (see Figure 1). The differential receiver inputs are connected to pins CANH and CANL through integrated filters. The filtered input signals are also used for the single-wire receivers. The receivers connected to pins CANH and CANL have threshold voltages that ensure a maximum noise margin in single-wire mode. A timer function (TxD dominant time-out function) has been integrated to prevent the bus lines from being driven into a permanent dominant state (thus blocking the entire network communication) due to a situation in which pin TXD is permanently forced to a LOW level, caused by a hardware and/or software application failure. If the duration of the LOW level on pin TXD exceeds a certain time, the transmitter will be disabled. The timer will be reset by a HIGH level on pin TXD. 7.1 Failure detector The failure detector is fully active in the normal operating mode. After the detection of a single bus failure the detector switches to the appropriate mode (see Table 4). The differential receiver threshold voltage is set at -3.2 V typical (VCC = 5 V). This ensures correct reception with a noise margin as high as possible in the normal operating mode and in the event of failures 1, 2, 5 and 6a. These failures, or recovery from them, do not destroy ongoing transmissions. The output drivers remain active, the termination does not change and the receiver remains in differential mode (see Table 4). Failures 3, 3a and 6 are detected by comparators connected to the CANH and CANL bus lines. Failures 3 and 3a are detected in a two-step approach. If the CANH bus line exceeds a certain voltage level, the differential comparator signals a continuous dominant condition. Because of inter operability reasons with the predecessor products PCA82C252 and TJA1053, after a first time-out the transceiver switches to single-wire operation through CANH. If the CANH bus line is still exceeding the CANH detection voltage for a second time-out, the TJA1054 switches to CANL operation; the CANH driver is switched off and the RTH bias changes to the pull-down current source. The time-outs (delays) are needed to avoid false triggering by external RF fields. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 5 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver Bus failures Description CANH wire interrupted CANH short-circuited to battery CANH short-circuited to VCC CANL short-circuited to ground CANH short-circuited to ground CANL short-circuited to battery CANL short-circuited to VCC CANL and CANH mutually short-circuited Termination Termination CANH (RTH) CANL (RTL) on on on on on weak[2] on weak[2] on weak[2] CANH driver on on off off on on on on on CANL driver on on on on off on off on off Receiver mode differential differential CANL CANL CANH differential CANH differential CANH Table 4. Failure 1 2 3 3a 4 5 6 6a 7 CANL wire interrupted on weak[1] weak[1] on on on on on [1] [2] A weak termination implies a pull-down current source behavior of 75 A typical. A weak termination implies a pull-up current source behavior of 75 A typical. Failure 6 is detected if the CANL bus line exceeds its comparator threshold for a certain period of time. This delay is needed to avoid false triggering by external RF fields. After detection of failure 6, the reception is switched to the single-wire mode through CANH; the CANL driver is switched off and the RTL bias changes to the pull-up current source. Recovery from failures 3, 3a and 6 is detected automatically after reading a consecutive recessive level by corresponding comparators for a certain period of time. Failures 4 and 7 initially result in a permanent dominant level on pin RXD. After a time-out the CANL driver is switched off and the RTL bias changes to the pull-up current source. Reception continues by switching to the single-wire mode via pins CANH or CANL. When failures 4 or 7 are removed, the recessive bus levels are restored. If the differential voltage remains below the recessive threshold level for a certain period of time, reception and transmission switch back to the differential mode. If any of the wiring failure occurs, the output signal on pin ERR will be set to LOW. On error recovery, the output signal on pin ERR will be set to HIGH again. In case of an interrupted open bus wire, this failure will be detected and signalled only if there is an open wire between the transmitting and receiving node(s). Thus, during open wire failures, pin ERR typically toggles. During all single-wire transmissions, EMC performance (both immunity and emission) is worse than in the differential mode. The integrated receiver filters suppress any HF noise induced into the bus wires. The cut-off frequency of these filters is a compromise between propagation delay and HF suppression. In single-wire mode, LF noise cannot be distinguished from the required signal. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 6 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 7.2 Low power modes The transceiver provides three low power modes which can be entered and exited via STB and EN (see Table 5 and Figure 3). The sleep mode is the mode with the lowest power consumption. Pin INH is switched to HIGH-impedance for deactivation of the external voltage regulator. Pin CANL is biased to the battery voltage via pin RTL. If the supply voltage is provided, pins RXD and ERR will signal the wake-up interrupt. The standby mode operates in the same way as the sleep mode but with a HIGH level on pin INH. The power-on standby mode is the same as the standby mode, however, in this mode the battery power-on flag is shown on pin ERR instead of the wake-up interrupt signal. The output on pin RXD will show the wake-up interrupt. This mode is only for reading out the power-on flag. Table 5. Mode Normal operating and low power modes Pin STB Pin EN Pin ERR LOW Goto-sleep command Sleep Standby Power-on standby Normal operating [1] [2] [3] [4] [5] Pin RXD HIGH LOW wake-up interrupt signal[1][2][3] HIGH Pin RTL switched to VBAT LOW LOW LOW HIGH HIGH LOW[4] LOW LOW wake-up interrupt signal[1][2][3] VBAT power-on flag[1][5] error flag no error flag wake-up interrupt signal[1][2][3] dominant received data recessive received data VBAT HIGH HIGH VCC If the supply voltage VCC is present Wake-up interrupts are released when entering normal operating mode. A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if VBAT = 5.3 V to 27 V. In case the goto-sleep command was used before. When VCC drops, pin EN will become LOW, but due to the fail-safe functionality this does not effect the internal functions. VBAT power-on flag will be reset when entering normal operating mode. Wake-up requests are recognized by the transceiver through two possible channels: * The bus lines for remote wake-up * Pin WAKE for local wake-up In order to wake-up the transceiver remotely through the bus lines, a filter mechanism is integrated. This mechanism makes sure that noise and any present bus failure conditions do not result into an erroneous wake-up. Because of this mechanism it is not sufficient to simply pull the CANH or CANL bus lines to a dominant level for a certain time. To guarantee a successful remote wake-up under all conditions, a message frame with a dominant phase of at least the maximum specified t(CANH) or t(CANL) in it is required. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 7 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver A local wake-up through pin WAKE is detected by a rising or falling edge with a consecutive level exceeding the maximum specified tWAKE. On a wake-up request the transceiver will set the output on pin INH to HIGH which can be used to activate the external supply voltage regulator. If VCC is provided the wake-up request can be read on the ERR or RXD outputs, so the external microcontroller can activate the transceiver (switch to normal operating mode) via pins STB and EN. To prevent a false remote wake-up due to transients or RF fields, the wake-up voltage levels have to be maintained for a certain period of time. In the low power modes the failure detection circuit remains partly active to prevent an increased power consumption in the event of failures 3, 3a, 4 and 7. To prevent a false local wake-up during an open wire at pin WAKE, this pin has a weak pull-up current source towards VBAT. However, in order to prevent EMC issues, it is recommended to connect a not used pin WAKE to pin BAT. INH is set to floating only if the goto-sleep command is entered successfully. To enter a successful goto-sleep command under all conditions, this command must be kept stable for the maximum specified th(sleep). Pin INH will be set to a HIGH level again by the following events only: * VBAT power-on (cold start) * Rising or falling edge on pin WAKE * A message frame with a dominant phase of at least the maximum specified t(CANH) or t(CANL), while pin EN or pin STB is at a LOW level * Pin STB goes to a HIGH level with VCC active To provide fail-safe functionality, the signals on pins STB and EN will internally be set to LOW when VCC is below a certain threshold voltage (VCC(stb)). 7.3 Power-on After power-on (VBAT switched on) the signal on pin INH will become HIGH and an internal power-on flag will be set. This flag can be read in the power-on standby mode through pin ERR (STB = 1; EN = 0) and will be reset by entering the normal operating mode. 7.4 Protections A current limiting circuit protects the transmitter output stages against short-circuit to positive and negative battery voltage. If the junction temperature exceeds the typical value of 165 C, the transmitter output stages are disabled. Because the transmitter is responsible for the major part of the power dissipation, this will result in a reduced power dissipation and hence a lower chip temperature. All other parts of the device will continue to operate. The pins CANH and CANL are protected against electrical transients which may occur in an automotive environment. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 8 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver POWER-ON STANDBY 10 NORMAL (4) 11 GOTO SLEEP (5) 01 (1) (2) (3) STANDBY 00 SLEEP 00 mbk949 Mode 10 stands for: Pin STB = HIGH and pin EN = LOW. (1) Mode change via input pins STB and EN. (2) Mode change via input pins STB and EN; it should be noted that in the sleep mode pin INH is inactive and possibly there is no VCC. Mode control is only possible if VCC of the transceiver is active. (3) Pin INH is activated after wake-up via bus input pin WAKE. (4) Transitions to normal mode clear the internal wake-up: interrupt and battery fail flag are cleared. (5) Transitions to sleep mode: pin INH is deactivated. Fig 3. Mode control 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Symbol VCC VBAT VTXD VRXD VERR VSTB VEN VCANH VCANL Vtrt(n) Parameter supply voltage battery supply voltage voltage on pin TXD voltage on pin RXD voltage on pin ERR voltage on pin STB voltage on pin EN voltage on pin CANH voltage on pin CANL transient voltage on pins CANH and CANL with respect to any other pin with respect to any other pin see Figure 6 Conditions Min -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -40 -40 -150 Max +6 +40 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 +40 +40 +100 Unit V V V V V V V V V V TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 9 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver Table 6. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Symbol VI(WAKE) II(WAKE) VINH VRTH VRTL RRTH RRTL Tvj Tstg VESD Parameter Conditions Min - [2] Max Unit input voltage on pin WAKE with respect to any other pin input current on pin WAKE voltage on pin INH voltage on pin RTH voltage on pin RTL termination resistance on pin RTH termination resistance on pin RTL virtual junction temperature storage temperature electrostatic discharge voltage human body model machine model [4] [5] [3] VBAT + 0.3 V mA -15 -0.3 -0.3 -0.3 500 500 -40 -55 -2 -100 VBAT + 0.3 V VBAT + 1.2 V VBAT + 1.2 V 16000 16000 +150 +150 +2 +100 C C kV V with respect to any other pin with respect to any other pin [1] [2] [3] All voltages are defined with respect to pin GND, unless otherwise specified. Positive current flows into the device. Only relevant if VWAKE < VGND - 0.3 V; current will flow into pin GND. Junction temperature in accordance with "IEC 60747-1". An alternative definition is: Tvj = Tamb + P x Rth(vj-a) where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient temperature (Tamb). Equivalent to discharging a 100 pF capacitor through a 1.5 k resistor. Equivalent to discharging a 200 pF capacitor through a 10 resistor and a 0.75 H coil. [4] [5] 9. Thermal characteristics Table 7. Symbol Rth(j-a) Rth(j-s) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air Typ 120 40 Unit K/W K/W thermal resistance from junction to substrate in free air bare die TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 10 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 10. Static characteristics Table 8. Static characteristics VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = -40 C to +150 C; all voltages are defined with respect to ground; positive currents flow into the device; unless otherwise specified.[1][2][3] Symbol VCC VCC(stb) ICC Parameter supply voltage supply voltage for forced standby mode (fail-safe) supply current normal operating mode; VTXD = VCC (recessive) normal operating mode; VTXD = 0 V (dominant); no load low power modes at VTXD = VCC VBAT battery supply voltage on pin BAT no time limit operating mode load dump IBAT battery supply current on pin BAT all modes and in low power modes at VRTL = VWAKE = VINH = VBAT VBAT = 12 V VBAT = 5 V to 27 V VBAT = 3.5 V VBAT = 1 V sleep mode; VCC = 0 V; VBAT = 12 V VBAT(Pwon) power-on flag voltage on pin BAT low power modes power-on flag set power-on flag not set Itot supply current plus battery current HIGH-level input voltage LOW-level input voltage HIGH-level input current pins STB and EN pin TXD IIL LOW-level input current pins STB and EN pin TXD VI = 1 V VI = 1 V 4 -800 8 -320 -100 A A VI = 4 V VI = 4 V -200 9 -80 20 -25 A A low power modes; VCC = 5 V; VBAT = VWAKE = VINH = 12 V 3.5 30 1 60 V V A 30 50 A 10 5 5 0 30 30 20 0 50 125 30 10 A A A A Conditions Min 4.75 2.75 4 10 0 -0.3 5.0 Typ 7 17 0 Max 5.25 4.5 11 27 10 +40 27 40 Unit V V mA mA A V V V Supplies (pins VCC and BAT) Pins STB, EN and TXD VIH VIL IIH 0.7VCC -0.3 VCC +0.3 0.3VCC V V TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 11 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver Table 8. Static characteristics ...continued VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = -40 C to +150 C; all voltages are defined with respect to ground; positive currents flow into the device; unless otherwise specified.[1][2][3] Symbol VOH) Parameter HIGH-level output voltage on pin ERR on pin RXD VOL LOW-level output voltage on pin ERR on pin RXD Pin WAKE IIL Vth(wake) Pin INH VH IL VCANH HIGH-level voltage drop IINH = -0.18 mA leakage current voltage on pin CANH sleep mode; VINH = 0 V VCC = 0 V to 5.0 V; VBAT 0 V; no time limit; with respect to any other pin VCC = 0 V to 5.0 V; VBAT 0 V; no time limit; with respect to any other pin ICANH = -40 mA ICANL = 40 mA no failures and bus failures 1, 2, 5 and 6a; see Figure 4 VCC = 5 V VCC = 4.75 V to 5.25 V VO(reces) recessive output voltage VTXD = VCC on pin CANH on pin CANL VO(dom) on pin CANH on pin CANL IO(CANH) output current on pin CANH RRTH < 4 k RRTL < 4 k ICANH = -40 mA ICANL = 40 mA normal operating mode; VCANH = 0 V; VTXD = 0 V low power modes; VCANH = 0 V; VCC = 5 V VCC - 0.2 VCC - 1.4 -110 -80 -0.25 0.2 1.4 -45 V V V V mA A -3.5 -0.70VCC -3.2 -0.64VCC -2.9 -0.58VCC V V -40 0.8 5 +40 V A V LOW-level input current wake-up threshold voltage VWAKE = 0 V; VBAT = 27 V VSTB = 0 V -10 2.5 -4 3.2 -1 3.9 A V IO = 1.6 mA IO = 7.5 mA 0 0 0.4 1.5 V V IO = -100 A IO = -1 mA VCC - 0.9 VCC - 0.9 VCC VCC V V Conditions Min Typ Max Unit Pins RXD and ERR Pins CANH and CANL VCANL voltage on pin CANL -40 - +40 V VCANH VCANL Vth(dif) voltage drop on pin CANH voltage drop on pin CANL differential receiver threshold voltage - - 1.4 1.4 V V dominant output voltage VTXD = 0 V; VEN = VCC TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 12 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver Table 8. Static characteristics ...continued VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = -40 C to +150 C; all voltages are defined with respect to ground; positive currents flow into the device; unless otherwise specified.[1][2][3] Symbol IO(CANL) Parameter output current on pin CANL Conditions normal operating mode; VCANL = 14 V; VTXD = 0 V low power modes; VCANL = 12 V; VBAT = 12 V Vd(CANH)(sc) detection voltage for short-circuit to battery voltage on pin CANH detection voltage for short-circuit to battery voltage on pin CANL wake-up threshold voltage on pin CANL on pin CANH Vth(wake) Vth(CANH)(sc) difference of wake-up threshold voltages single-ended receiver threshold voltage on pin CANH low power modes low power modes low power modes normal operating mode and failures 4, 6 and 7 VCC = 5 V VCC = 4.75 V to 5.25 V Vth(CANL)(sc) single-ended receiver threshold voltage on pin CANL normal operating mode and failures 3 and 3a VCC = 5 V VCC = 4.75 V to 5.25 V Ri(CANH)(sc) Ri(CANL)(sc) Ri(dif) single-ended input normal operating mode resistance on pin CANH single-ended input normal operating mode resistance on pin CANL differential input resistance switch-on resistance on pin RTL and VCC switch-on resistance on pin RTH and ground output voltage on pin RTH output current on pin RTL pull-up current on pin RTL normal operating mode 3.15 0.63VCC 110 110 220 3.3 0.66VCC 165 165 330 3.45 0.69VCC 270 270 540 V V k k k 1.5 0.30VCC 1.7 0.34VCC 1.85 0.37VCC V V 2.5 1.1 0.8 3.2 1.8 1.4 3.9 2.5 V V V normal operating mode; VCC = 5 V low power modes normal operating mode VCC = 5 V VCC = 4.75 V to 5.25 V 6.6 1.32VCC 7.2 1.44VCC 7.8 1.56VCC V V Min 45 1.5 1.1 Typ 70 0 1.7 1.8 Max 100 1.85 2.5 Unit mA A V V Vd(CANL)(sc) Vth(wake) Pins RTH and RTL Rsw(RTL) Rsw(RTH) VO(RTH) IO(RTL) Ipu(RTL) normal operating mode; |IO| < 10 mA normal operating mode; |IO| < 10 mA low power modes; IO = 1 mA low power modes; VRTL = 0 V normal operating mode and failures 4, 6 and 7 -1.25 50 50 0.7 -0.65 75 100 100 1.0 -0.3 V mA A TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 13 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver Table 8. Static characteristics ...continued VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = -40 C to +150 C; all voltages are defined with respect to ground; positive currents flow into the device; unless otherwise specified.[1][2][3] Symbol Ipd(RTH) Parameter pull-down current on pin RTH shutdown junction temperature Conditions normal operating mode and failures 3 and 3a Min Typ 75 Max Unit A Thermal shutdown Tj(sd) 155 165 180 C [1] [2] [3] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 C for dies on wafer level, and above this for cased products 100 % tested at Tamb = 25 C, unless otherwise specified. For bare die, all parameters are only guaranteed if the back side of the die is connected to ground. A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if VBAT = 5.3 V to 27 V (see Table 5). 11. Dynamic characteristics Table 9. Dynamic characteristics VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = -40 C to +150 C; all voltages are defined with respect to ground; unless otherwise specified.[1][2][3] Symbol tt(r-d) Parameter transition time for recessive to dominant (on pins CANL and CANH) Conditions between 10 % and 90 %; R1 = 100 ; C1 = 10 nF; C2 = not present; see Figure 5 Min 0.35 Typ 0.65 Max Unit s tt(d-r)) transition time for dominant between 10 % and 90 %; R1 = 100 ; to recessive (on pins CANL C1 = 10 nF; C2 = not present; and CANH) see Figure 5 propagation delay TXD (LOW) to RXD (LOW) no failures and failures 1, 2, 5 and 6a; R1 = 100 ; see Figure 4 and Figure 5 C1 = 1 nF; C2 = not present C1 = C2 = 3.3 nF failures 3, 3a, 4, 6 and 7; R1 = 100 ; see Figure 4 and Figure 5 C1 = 1 nF; C2 = not present C1 = C2 = 3.3 nF 0.2 0.3 - s tPD(L) - 0.75 1 1.5 1.75 s s - 0.85 1.1 1.4 1.7 s s tPD(H) propagation delay TXD (HIGH) to RXD (HIGH) no failures and failures 1, 2, 5 and 6a; R1 = 100 ; see Figure 4 and Figure 5 C1 = 1 nF; C2 = not present C1 = C2 = 3.3 nF failures 3, 3a, 4, 6 and 7; R1 = 100 ; see Figure 4 and Figure 5 C1 = 1 nF; C2 = not present C1 = C2 = 3.3 nF [4] - 1.2 2.5 1.9 3.3 s s 1.1 1.5 0.6 0.3 - 1.7 2.2 50 s s s s s tr tf treact(sleep) TJA1054_4 bus line output rise time bus line output fall time reaction time of goto sleep command between 10 % and 90 %; C1 = 10 nF; see Figure 5 between 10 % and 90 %; C1 = 1 nF; see Figure 5 5 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 14 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver Table 9. Dynamic characteristics ...continued VCC = 4.75 V to 5.25 V; VBAT = 5.0 V to 27 V; VSTB = VCC; Tvj = -40 C to +150 C; all voltages are defined with respect to ground; unless otherwise specified.[1][2][3] Symbol tdis(TxD) tCANH tCANL tWAKE Parameter Conditions Min 0.75 [4] Typ - Max 4 38 38 38 Unit ms s s s disable time of TxD normal operating mode; VTXD = 0 V permanent dominant timer dominant time for remote wake-up on pin CANH dominant time for remote wake-up on pin CANL required time on pin WAKE for local wake-up failure detection time low power modes; VBAT = 12 V low power modes; VBAT = 12 V low power modes; VBAT = 12 V; for wake-up after receiving a falling or rising edge normal operating mode failures 3 and 3a failures 4, 6 and 7 low power modes; VBAT = 12 V failures 3 and 3a failures 4 and 7 7 7 7 [4] [4] tdet 1.6 0.3 1.6 0.1 0.3 7 125 0.3 - 4 8.0 1.6 8.0 1.6 1.6 38 750 1.6 - ms ms ms ms ms s s ms trec failure recovery time normal operating mode failures 3 and 3a failures 4 and 7 failure 6 low power modes; VBAT = 12 V failures 3, 3a, 4 and 7 ndet pulse-count difference normal operating mode and between CANH and CANL failures 1, 2, 5 and 6a; for failure detection pin ERR becomes LOW number of consecutive pulses on CANH and CANL simultaneously for failure recovery failures 1, 2, 5 and 6a nrec - 4 - [1] [2] [3] [4] All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested at Tamb = 125 C for dies on wafer level, and above this for cased products 100 % tested at Tamb = 25 C, unless otherwise specified. For bare die, all parameters are only guaranteed if the back side of the die is connected to ground. A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if VBAT = 5.3 V to 27 V (see Table 5). To guarantee a successful mode transition under all conditions, the maximum specified time must be applied. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 15 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver VTXD 2 V to VCC 0V VCANL 5V 3.6 V 1.4 V VCANH 0V 2.2 V -3.2 V VCAN -5 V VRXD 0.7VCC 0.3VCC tPD(L) tPD(H) mgl424 Vdiff = VCANH - VCANL Fig 4. Timing diagram for dynamic characteristics 12. Test information +5 V INH WAKE TXD STB EN RXD 1 7 2 5 6 3 13 20 pF GND 4 ERR mgl423 BAT 14 VCC 10 8 RTH R1 C1 12 CANL C2 TJA1054 11 CANH 9 RTL R1 C1 Termination resistors R1 (100 ) are not connected to pin RTH or pin RTL for testing purposes because the minimum load allowed on the CAN bus lines is 500 per transceiver. The capacitive bus load of 10 nF is split into 3 equal capacitors (3.3 nF) to simulate the bus cable. Fig 5. Test circuit for dynamic characteristics TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 16 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver +12 V +5 V 10 F VCC 10 8 RTH 125 511 12 CANL 1 nF 11 CANH 511 9 13 20 pF GND 4 ERR mgl426 INH WAKE TXD STB EN RXD 1 7 2 5 6 3 14 BAT 1 nF TJA1054 GENERATOR 1 nF RTL 125 1 nF The waveforms of the applied transients on pins CANH and CANL will be in accordance with ISO 7637 part 1: test pulses 1, 2, 3a and 3b. Fig 6. Test circuit for automotive transients VBAT BATTERY P8xC592/P8xCE598 CAN CONTROLLER VDD +5 V +5 V CTX0 CRXO Px.x Px.x Px.x TXD WAKE 2 7 3 RXD 5 STB 4 ERR 6 EN INH 1 14 10 13 BAT VCC GND 100 nF TJA1054 CAN TRANSCEIVER 8 RTH 11 CANH 12 CANL 9 RTL CAN BUS LINE mgl425 Fig 7. Application diagram 12.1 Quality information This product has been qualified to the appropriate Automotive Electronics Council (AEC) standard Q100 or Q101 and is suitable for use in automotive applications. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 17 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 13. Bare die information Table 10. Symbol INH TXD RXD ERR STB EN WAKE RTH RTL VCC CANH CANL GND GND BAT [1] Bonding pad locations Pad 1 2 3 4 5 6 7 8 9 10 11 12 13a 13b 14 Coordinates[1] x 106 111 750 1347 2248 2521 2521 2550 2359 1886 872 437 80 80 106 y 317 169 111 111 103 240 381 1269 1840 1809 1840 1840 1356 1241 772 All coordinates (m) represent the position of the center of each pad with respect to the bottom left-hand corner of the top aluminium layer (see Figure 8). 12 11 10 9 13a 13b 1990 m 14 8 TJA1054U 1 2 x 3 4 5 7 6 0 0 y 2700 m mgw505 Fig 8. Bonding pad locations TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 18 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 14. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE vMA Z 14 8 Q A2 pin 1 index Lp 1 e bp 7 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 0.010 0.057 inches 0.069 0.004 0.049 0.019 0.0100 0.35 0.014 0.0075 0.34 0.244 0.039 0.041 0.228 0.016 0.028 0.004 0.012 8 o 0 o Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 9. Package outline SOT108-1 (SO14) TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 19 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 15. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 "Surface mount reflow soldering description". 15.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 15.2 Wave and reflow soldering Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following: * Through-hole components * Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: * * * * * * Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus SnPb soldering 15.3 Wave soldering Key characteristics in wave soldering are: * Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave * Solder bath specifications, including temperature and impurities TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 20 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 15.4 Reflow soldering Key characteristics in reflow soldering are: * Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 10) than a SnPb process, thus reducing the process window * Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board * Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 11 and 12 Table 11. SnPb eutectic process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 2.5 2.5 Table 12. 235 220 Lead-free process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 1.6 1.6 to 2.5 > 2.5 260 260 250 350 to 2000 260 250 245 > 2000 260 245 245 350 220 220 Package thickness (mm) Package thickness (mm) Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 10. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 21 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 10. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 "Surface mount reflow soldering description". 16. Revision history Table 13. TJA1054_4 Modifications: Revision history Release date 20090924 Data sheet status Product data sheet Change notice Supersedes TJA1054_3 Document ID * * * The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Value of parameter VESD (machine model) changed in Table 6. Product specification Product specification Preliminary specification TJA1054_2 TJA1054_1 - TJA1054_3 (9397 750 11721) TJA1054_2 (9397 750 08965) TJA1054_1 (9397 750 03636) 20040323 20011120 19990211 TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 22 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 17. Legal information 17.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Bare die -- All die are tested on compliance with their related technical specifications as stated in this data sheet up to the point of wafer sawing and are handled in accordance with the NXP Semiconductors storage and transportation conditions. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post-packing tests performed on individual die or wafers. NXP Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, NXP Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. All die sales are conditioned upon and subject to the customer entering into a written die sale agreement with NXP Semiconductors through its legal department. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 17.3 Disclaimers General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 23 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TJA1054_4 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 -- 24 September 2009 24 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 19. Contents 1 2 2.1 2.2 2.3 2.4 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 8 9 10 11 12 12.1 13 14 15 15.1 15.2 15.3 15.4 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Optimized for in-car low-speed communication 1 Bus failure management. . . . . . . . . . . . . . . . . . 1 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Support for low power modes . . . . . . . . . . . . . . 2 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Failure detector . . . . . . . . . . . . . . . . . . . . . . . . . 5 Low power modes. . . . . . . . . . . . . . . . . . . . . . . 7 Power-on. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal characteristics. . . . . . . . . . . . . . . . . . 10 Static characteristics. . . . . . . . . . . . . . . . . . . . 11 Dynamic characteristics . . . . . . . . . . . . . . . . . 14 Test information . . . . . . . . . . . . . . . . . . . . . . . . 16 Quality information . . . . . . . . . . . . . . . . . . . . . 17 Bare die information . . . . . . . . . . . . . . . . . . . . 18 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19 Soldering of SMD packages . . . . . . . . . . . . . . 20 Introduction to soldering . . . . . . . . . . . . . . . . . 20 Wave and reflow soldering . . . . . . . . . . . . . . . 20 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 20 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contact information. . . . . . . . . . . . . . . . . . . . . 24 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 24 September 2009 Document identifier: TJA1054_4 |
Price & Availability of TJA1054
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |